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Yunhe Pan, Aiguo Fei
Advisor Xicheng Lu
ISSN 3069-8928
CN 33-1439/TP
IF (2024 JCR) 2.9
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Volume 27 Issue 3，2026
Regular Papers
De-blocking adaptive feedback control design for shared-buffer CIOQ switching architecture AI Introduction
“In the field of network switching architecture, researchers have made significant progress. They proposed a de-blocking adaptive feedback control (AFC) design for the combined input and output queued (CIOQ) switching architecture. This design introduces a credit timeout detection mechanism (CTDM) and combines a VOQ dynamic regulation algorithm (VDRA) with a threshold dynamic adaptive algorithm (TDAA) to address issues like head-of-line blocking, packet loss, and congestion spreading. Theoretical analysis and experiments show that the proposed design achieves high throughput, low latency, and improved system stability, outperforming traditional architectures.”Abstract：To address the issues of head-of-line (HOL) blocking at the virtual output queue (VOQ) level, packet loss, and congestion spreading caused by buffer overflow in the shared-buffer-based combined input and output queued (CIOQ) switching architecture, while enhancing its performance and stability, we propose a de-blocking adaptive feedback control (AFC) design in this study. The introduction of the credit timeout detection mechanism (CTDM) enables the CIOQ to achieve theoretical 100% non-blocking state, effectively eliminating the impact of HOL blocking. With the combined effect of the proposed VOQ dynamic regulation algorithm (VDRA) and threshold dynamic adaptive algorithm (TDAA), it can reduce the risk of congestion spreading caused by buffer overflow and consequently improve the overall performance of the system. Both theoretical analysis and experimental results demonstrate that, under typical traffic conditions, the proposed design achieves a maximum throughput of 1499.66 Gb/s and a minimum latency of 83 ns. Additionally, the effective throughput ratio reaches 96.94%, with a data link layer packet (DLLP) loss ratio of merely 0.61% and a packet loss rate as low as 0.6%. In comparison with traditional CIOQ and input queued (IQ) switch architectures, the proposed design demonstrates improvements in throughput by 15.12% and 20.55%, and forwarding latency is reduced by 26.9% and 54.7%, respectively, and the system stability is stronger, which can fully satisfy the demand for data exchange in complex situations.Keywords：Shared-buffer CIOQ switching architecture;Head-of-line (HOL) blocking;Congestion spreading;Adaptive feedback control (AFC);Peripheral component interconnect express (PCIe) interconnect protocol13|8|0Updated：2026-03-23Regular Papers
FTHOE: a Hamiltonian-driven fault-tolerant routing algorithm for wafer-scale interconnection networks Enhanced Publication AI Introduction
“In the realm of wafer-scale interconnection networks, researchers have introduced a novel fault-tolerant routing algorithm, FTHOE. This algorithm addresses node and link faults by dynamically adjusting routing paths based on local fault information. It enhances network reliability and performance by reducing latency and improving throughput, offering robust fault tolerance and load-balancing capabilities.”Abstract：As application scenarios continue to grow in complexity, wafer-scale systems impose increasingly stringent requirements on the reliability of interconnection networks. Under inevitable process-induced manufacturing defects and environmental disturbances, node and link faults occur frequently in wafer-scale interconnection networks, making fault tolerance a key factor in improving overall system reliability. To address chiplet node faults and link faults in wafer-scale interconnection networks, this paper proposes a load-balancing virtual-channel-less fault-tolerant routing algorithm, termed FTHOE. The proposed algorithm is based on a Hamiltonian routing strategy and the odd–even turn model. By exploiting local fault vector information at the current node, FTHOE dynamically adjusts the output port selection priority, thereby shortening detour paths around faulty regions while effectively reducing the probability of packets being trapped in fault neighborhoods. At the same time, FTHOE preserves a relatively high degree of minimal path diversity by retaining the adaptiveness of Hamiltonian-based routing under fault conditions, thereby enhancing network load-balancing and overall communication performance. Simulation results demonstrate that, compared with existing fault-tolerant routing algorithms, FTHOE significantly reduces average network latency and improves throughput, exhibiting robust fault tolerance and load-balancing performance under complex fault scenarios.Keywords：Wafer-scale system;Fault-tolerant;Hamiltonian path;Odd–even turn model;Load balancing12|5|0Updated：2026-03-23Regular Papers
DDiNER: domain dictionary-guided Chinese named entity recognition for complex industrial contexts AI Introduction
“In the field of Chinese named entity recognition (NER) for the process industry, a new study introduces significant research progress. Experts have developed DDiNER, a domain dictionary-guided NER framework that integrates a hierarchical industrial domain dictionary with BERT via a hierarchical lexicon adapter, combined with BiLSTM and CRF layers. This innovative approach addresses challenges like ambiguous entity boundaries and limited annotated data, achieving superior performance with average precision, recall, and F1-scores of 95.75%, 95.73%, and 95.74%, respectively. The study provides an effective and scalable solution for industrial Chinese NER, paving the way for advanced intelligent applications.”Abstract：Accurate Chinese named entity recognition (NER) in the process industry is crucial for applications such as information extraction, knowledge graph construction, and intelligent decision-making. However, challenges, including ambiguous entity boundaries, semantic overlaps, and limited annotated data, significantly hinder performance. To address these issues, this study proposes DDiNER, a domain dictionary-guided Chinese NER framework that integrates a hierarchical industrial domain dictionary with bidirectional encoder representations from Transformers (BERT) via a hierarchical lexicon adapter (HLA), combined with bidirectional long short-term memory (BiLSTM) and conditional random field (CRF) layers for multilevel feature fusion. Experimental results show that DDiNER achieves superior performance, with average precision, recall, and F1-scores of 95.75%, 95.73%, and 95.74%, respectively, outperforming state-of-the-art models. Validation on an independent dataset confirms its robustness and strong capability in recognizing unseen and long-tail entities. This study provides an effective and scalable solution for industrial Chinese NER, with significant potential for downstream intelligent applications.Keywords：Named entity recognition (NER);Process industry;Domain dictionary;Hierarchical lexicon adapter (HLA)9|6|0Updated：2026-03-23Regular Papers
Leveraging peripheral interactions to improve drivers’ situation awareness and NDRT efficiency Enhanced Publication AI Introduction
“The latest research in automated driving explores how airflow and surround sound can enhance driver situation awareness and non-driving-related task efficiency. Two studies found that integrating these interactions significantly boosts driver awareness, especially during complex tasks, reduces workload, and improves user experience. This work paves the way for safer and more productive in-vehicle interaction systems.”Abstract：L3 automated driving has introduced a trend of drivers engaging in non-driving-related tasks (NDRTs), but it also poses safety challenges for reconstructing drivers’ situation awareness (SA). Two consecutive empirical studies in a driving simulator were conducted to investigate the effect of two peripheral interactions (airflow conveying the intended behaviors of vehicles and surround sound conveying the information of road users) on drivers’ SA performance, NDRT efficiency, workload, and user experience. The first study (n=21) explored the differential effects of airflow, surround sound, and their integration. The second study (n=30) investigated how the integrated interaction performed across different NDRT difficulties. Results demonstrated that airflow and surround sound could significantly improve drivers’ SA when used individually, each having distinct advantages. The integration of these two interactions yielded the best results. Notably, the integrated interaction showed greater effectiveness in improving SA during hard NDRT compared to the easy one. Furthermore, drivers reported reduced subjective workloads and enhanced user experience when leveraging these peripheral interaction methods. Our work offers insights for designing in-vehicle interaction systems that not only reconstruct drivers’ SA but also support NDRT participation, ensuring safety and productivity.Keywords：Automated driving;Situation awareness;Non-driving-related tasks;Peripheral interaction;Surround sound;Airflow11|3|0Updated：2026-03-23Regular Papers
“In the field of large-scale packing problems, researchers have introduced a novel hierarchical algorithm. This system classifies parts into three levels based on area and fullness, applying distinct packing strategies to each. The innovative “shape matching” method, along with “box stacking” and “gravity packing,” forms a comprehensive solution. Experiments show higher material utilization compared to traditional methods.”Abstract：To address the challenge of large-scale packing problems, this paper proposes a novel hierarchical algorithm based on the geometrical classification of parts. The algorithm begins by classifying parts into three levels based on their area and fullness and then applies distinct packing strategies to each category. An innovative “shape matching” method is introduced, which, together with the “box stacking” (for rectangular parts) and “gravity packing,” forms a comprehensive hierarchical packing system. Level‑1 comprises large rectangular parts, which are arranged using the box stacking algorithm. By aligning the corner points of the parts’ bounding boxes, this method avoids the hooking issue commonly encountered in gravity packing. Level‑2 includes both large, irregular parts and medium-sized parts. They are first processed using the shape matching algorithm, where rotation and translation are applied to achieve contour complementarity. The quality of the match is evaluated using the shape matching coefficient (SMC). If the SMC fails to reach the preset quality threshold, the system switches to box stacking (for large, irregular parts) or gravity packing (for medium-sized parts). Level‑3 comprises the remaining smaller parts and those that failed to pack in the previous two levels. For these parts, shape matching is attempted first, and the system resorts to gravity packing in case of failure. The experimental and comparative results demonstrate that the proposed hierarchical algorithm achieves higher material utilization than the traditional gravity packing algorithm. This improvement is facilitated by the box stacking and shape matching strategies, which promote a more orderly and compact arrangement of parts.Keywords：Large-scale packing;Hierarchical algorithm;Box stacking;Shape matching;Gravity packing;Principle of minimum potential energy9|5|0Updated：2026-03-23
0 1 Hybrid-augmented intelligence: collaboration and cognition
0 4 Applications of artificial intelligence in intelligent manufacturing: a review*
0 5 Challenges and opportunities: from big data to knowledge in AI 2.0
0 6 Current trends in the development of intelligent unmanned autonomous systems
0 7 Recent advances in efficient computation of deep convolutional neural networks
0 8 Terahertz time-domain spectroscopy and micro-cavity components for probing samples: a review
0 9 Cross-media analysis and reasoning: advances and directions
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