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HyRAS: a hybrid redundancy- and serialization-based fault-tolerant architecture for through-silicon vias
Regular Papers | Updated：2026-05-27

    • HyRAS: a hybrid redundancy- and serialization-based fault-tolerant architecture for through-silicon vias

    • HyRAS：一种用于硅通孔的混合冗余与串行化容错架构
    • ENGINEERING Information Technology & Electronic Engineering   Vol. 27, Issue 5, Pages: 1-14(2026)

    • DOI：10.1631/ENG.ITEE.2025.0156    

      CLC： TN47

    • Received：26 November 2025，

      Revised：2026-04-15，

      Online First：19 May 2026，

      Published：2026-05

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  • Chenglong SUN, Yanqing ZHOU, Qi WANG, et al. HyRAS: a hybrid redundancy- and serialization-based fault-tolerant architecture for through-silicon vias[J]. ENGINEERING Information Technology & Electronic Engineering, 2026, 27(5): 1-14. DOI： 10.1631/ENG.ITEE.2025.0156.

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