Reversible binary subtractor design using quantum dot-cellular automata

Jadav Chandra DAS; Debashis DE

doi:10.1631/FITEE.1600999

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Reversible binary subtractor design using quantum dot-cellular automata

Regular Papers | Updated：2022-05-19

- Reversible binary subtractor design using quantum dot-cellular automata
- 基于量子元胞自动机的可逆二进制减法器设计
- Frontiers of Information Technology & Electronic Engineering Vol. 18, Issue 9, Pages: 1416-1429(2017)
- Affiliations：
  
  Department of Computer Science and Engineering, West Bengal University of Technology, Kolkata 700064, India
  Department of Physics, University of Western Australia, WA 6009, Australia
- Author bio：
  
  [ "Jadav Chandra DAS, jadav2u@gmail.com" ]
  Debashis DE, E-mail:dr.debashis.de@gmail.com
- Funds：
- DOI：10.1631/FITEE.1600999
  CLC： TN91
- Received：22 February 2016，
  
  Revised：2017-;9-25，
  
  Published：2017-09
- Accepted：
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Jadav Chandra DAS, Debashis DE. Reversible binary subtractor design using quantum dot-cellular automata[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(9): 1416-1429.
DOI：

Jadav Chandra DAS, Debashis DE. Reversible binary subtractor design using quantum dot-cellular automata[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(9): 1416-1429. DOI： 10.1631/FITEE.1600999.

摘要

在纳米技术领域，量子元胞自动机（quantum dot-cellular automata

QCA）可作为传统互补金属氧化物半导体（complementary metal oxide semiconductor

CMOS）电路的替代方案，具有可观的发展前景。QCA设备密度高，运行速度快，且功耗极低。在QCA中，可逆逻辑有着广泛应用。研究者已开发多个基于QCA的可逆逻辑电路，但基于QCA的可逆二进制减法器研究却不多见。QCA低功耗和高电流密度的特点，使其可用于设计纳米尺度节能逻辑电路。然而，其对大量逻辑门的需求和不利的无用输出，可能限制基于QCA逻辑电路的功能。我们利用QCA设计并实现了一个DG门，实现了DG门的普遍特征。利用该DG门的QCA部分，可以获得新的可逆二进制减法器。相比现有可逆减法器，我们设计的减法器量子成本低，无用输出少。电路设计与模拟基于QCA Designer-2.0.3软件。

Abstract

In the field of nanotechnology

quantum dot-cellular automata (QCA) is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor (CMOS) circuit. QCA has high device density

high operating speed

and extremely low power consumption. Reversible logic has widespread applications in QCA. Researchers have explored several designs of QCA-based reversible logic circuits

but still not much work has been reported on QCA-based reversible binary subtractors. The low power dissipation and high circuit density of QCA pledge the energy-efficient design of logic circuit at a nano-scale level. However

the necessity of too many logic gates and detrimental garbage outputs may limit the functionality of a QCA-based logic circuit. In this paper we describe the design and implementation of a DG gate in QCA. The universal nature of the DG gate has been established. The QCA building block of the DG gate is used to achieve new reversible binary subtractors. The proposed reversible subtractors have low quantum cost and garbage outputs compared to the existing reversible subtractors. The proposed circuits are designed and simulated using QCA Designer-2.0.3.

关键词

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references

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