Function synthesis algorithm based on RTD-based three-variable universal logic gates

Mao-qun YAO; Kai YANG; Ji-zhong SHEN; Cong-yuan XU

doi:10.1631/FITEE.1601730

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Function synthesis algorithm based on RTD-based three-variable universal logic gates

Regular Papers | Updated：2022-05-19

- Function synthesis algorithm based on RTD-based three-variable universal logic gates
- 基于RTD三变量通用逻辑门的函数综合算法
- Frontiers of Information Technology & Electronic Engineering Vol. 18, Issue 10, Pages: 1654-1664(2017)
- Affiliations：
  
  Hangzhou Institute of Service Engineering, Hangzhou Normal University, Hangzhou 310036, China
  College of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China
- Author bio：
  
  Mao-qun YAO, yaomaoqun@163.com
- Funds：
- DOI：10.1631/FITEE.1601730
  CLC： TN47
- Received：21 November 2016，
  
  Revised：2017-10-31，
  
  Published：2017-10
- Accepted：
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Mao-qun YAO, Kai YANG, Ji-zhong SHEN, et al. Function synthesis algorithm based on RTD-based three-variable universal logic gates[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(10): 1654-1664.
DOI：

Mao-qun YAO, Kai YANG, Ji-zhong SHEN, et al. Function synthesis algorithm based on RTD-based three-variable universal logic gates[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(10): 1654-1664. DOI： 10.1631/FITEE.1601730.

摘要

共振隧穿器件（resonant tunneling device

RTD）比传统电子器件CMOS具有更优秀的性能，极有可能成为下一代集成电路的电子器件。通用逻辑门因其强大的逻辑功能，成为数字电路的重要单元电路，而目前基于RTD通用逻辑门实现

变量逻辑函数的综合算法还很缺乏。本文基于RTD通用逻辑门，提出实现任意

变量逻辑函数的综合算法。首先，提出真值矩阵的概念，并提出一种运用真值矩阵将任意

变量逻辑函数分解成3变量子集函数的非相交分解算法；在上述工作基础上，提出用基于RTD通用阈值逻辑门（universal threshold logic gates

UTLG）、基于RTD三变量异或门XOR3和基于RTD三变量通用逻辑门ULG3实现

变量逻辑函数的综合算法。当

变量逻辑函数为可直接非相交分解函数时，用所提出算法实现的电路十分简单；当

变量逻辑函数为不可直接非相交分解函数时，用所提算法实现的电路比用单一UTLG门或ULG3门实现

变量逻辑函数的电路简单。提出的综合算法规范、可程序化，可方便地用于设计基于RTD通用逻辑门的任意

变量逻辑函数电路。

Abstract

Compared with complementary metal-oxide semiconductor (CMOS)

the resonant tunneling device (RTD) has better performances; it is the most promising candidate for next-generation integrated circuit devices. The universal logic gate is an important unit circuit because of its powerful logic function

but there are few function synthesis algorithms that can implement an

-variable logical function by RTD-based universal logic gates. In this paper

we propose a new concept

i.e.

the truth value matrix. With it a novel disjunctive decomposition algorithm can be used to decompose an arbitrary

-variable logical function into three-variable subset functions. On this basis

a novel function synthesis algorithm is proposed

which can implement arbitrary

-variable logical functions by RTD-based universal threshold logic gates (UTLGs)

RTD-based three-variable XOR gates (XOR3s)

and RTD-based three-variable universal logic gate (ULG3s). When this proposed function synthesis algorithm is used to implement an

-variable logical function

if the function is a directly disjunctive decomposition one

the circuit structure will be very simple

and if the function is a non-directly disjunctive decomposition one

the circuit structure will be simpler than when using only UTLGs or ULG3s. The proposed function synthesis algorithm is straightforward to program

and with this algorithm it is convenient to implement an arbitrary

-variable logical function by RTD-based universal logic gates.

关键词

Keywords

references

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