Exploring high-performance processor architecture beyond the exascale

Xiang-hui XIE; Xun JIA

doi:10.1631/FITEE.1800424

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Exploring high-performance processor architecture beyond the exascale

Special Issue on Post-exascale Supercomputing | Updated：2022-05-19

- Exploring high-performance processor architecture beyond the exascale
- 后E级时代高性能处理器架构的探索
- Frontiers of Information Technology & Electronic Engineering Vol. 19, Issue 10, Pages: 1224-1229(2018)
- Affiliations：
  
  State Key Laboratory of Mathematical Engineering and Advanced Computing, Wuxi 214125, China
- Author bio：
  
  Xiang-hui XIE, E-mail: xie.xianghui@meac-skl.cn
  [ "Xun JIA, jia.xun@meac-skl.cn" ]
- Funds：
- DOI：10.1631/FITEE.1800424
  CLC： TP303
- Received：11 July 2018，
  
  Revised：2018-10-10，
  
  Published：2018-10
- Accepted：
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Xiang-hui XIE, Xun JIA. Exploring high-performance processor architecture beyond the exascale[J]. Frontiers of Information Technology & Electronic Engineering, 2018, 19(10): 1224-1229.
DOI：

Xiang-hui XIE, Xun JIA. Exploring high-performance processor architecture beyond the exascale[J]. Frontiers of Information Technology & Electronic Engineering, 2018, 19(10): 1224-1229. DOI： 10.1631/FITEE.1800424.

摘要

科学计算与工程应用对高性能日益增长的需求将推动高性能计算进入后E级时代。高性能处理器作为超级计算系统核心部件，其架构设计对提高系统性能至关重要。首先介绍后E级时代高性能处理器架构设计的3个目标，即性能有效扩展、资源高效利用和适应多种应用。其次，提出标量运算众核主芯片连接应用加速从芯片的Massa处理器架构，通过计算资源分布和应用定制硬件的结合，满足后E级时代高性能处理器架构设计的目标。最后，讨论了Massa架构未来需要重点研究的若干问题。

Abstract

The ever-increasing need for high performance in scientific computation and engineering applications will push high-performance computing beyond the exascale. As an integral part of a supercomputing system

high-performance processors and their architecture designs are crucial in improving system performance. In this paper

three architecture design goals for high-performance processors beyond the exascale are introduced

including effective performance scaling

efficient resource utilization

and adaptation to diverse applications. Then a high-performance many-core processor architecture with scalar processing and application-specific acceleration (Massa) is proposed

which aims to achieve the above three goals by employing the techniques of distributed computational resources and application-customized hardware. Finally

some future research directions regarding the Massa architecture are discussed.

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