Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits

Hamideh KHAJEHNASIR-JAHROMI; Pooya TORKZADEH; Massoud DOUSTI

doi:10.1631/FITEE.2100287

Your Location：

Home >

Browse articles >

Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits

Regular Papers | Updated：2022-09-08

- Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits
  Enhanced Publication
- 用于设计量子点元胞自动机算术电路的可扩展 1 位全加器
- Frontiers of Information Technology & Electronic Engineering Vol. 23, Issue 8, Pages: 1264-1276(2022)
- Affiliations：
  
  Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran147789 3855, Iran
- Author bio：
  
  h.khajehnasir@srbiau.ac.ir
  ‡Corresponding authors
  m_dousti@srbiau.ac.ir
- Funds：
- DOI：10.1631/FITEE.2100287
  CLC： TN79
- Published：23 August 2022，
  
  Received：17 June 2021，
  
  Revised：30 September 2021，
- Accepted：
Scan QR Code
HAMIDEH KHAJEHNASIR-JAHROMI, POOYA TORKZADEH, MASSOUD DOUSTI. Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits. [J]. Frontiers of information technology & electronic engineering, 2022, 23(8): 1264-1276.
DOI：

HAMIDEH KHAJEHNASIR-JAHROMI, POOYA TORKZADEH, MASSOUD DOUSTI. Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits. [J]. Frontiers of information technology & electronic engineering, 2022, 23(8): 1264-1276. DOI： 10.1631/FITEE.2100287.

摘要

近年来，在纳米尺度上使用互补金属氧化物半导体（CMOS）技术设计逻辑电路面临着各种挑战。漏电流、短效应沟道和高能量耗散是一些亟待解决的问题。量子点元胞自动机（QCA）代表了未来可能替代CMOS的一种合适选择，因为与标准CMOS相比，它消耗的能量微不足道。设计算术电路关键是基于1位全加器的结构。低复杂度的全加器模块有利于开发各种复杂结构。本文介绍了基于单元交互的可扩展1位QCA全加器结构。我们提出的全加器包含QCA设计偏好，例如使用的单元数量少、延迟低和占用面积小。此外，所提结构已扩展到更大的电路，包括4位行波进位加法器（RCA）、4位行波借位减法器（RBS）、加/减电路和2位阵列乘法器。所有设计均使用 QCA Designer-E 2.2版软件进行仿真和验证。该工具可以估计能量消耗以及评估电路的性能。仿真结果表明，所提设计在复杂度、面积、延迟、成本和能量消耗方面都是有效的。

Abstract

Designing logic circuits using complementary metal-oxide-semiconductor (CMOS) technology at the nano scale has been faced with various challenges recently. Undesirable leakage currents

the short-effect channel

and high energy dissipation are some of the concerns. Quantum-dot cellular automata (QCA) represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard CMOS. The key point of designing arithmetic circuits is based on the structure of a 1-bit full adder. A low-complexity full adder block is beneficial for developing various intricate structures. This paper represents scalable 1-bit QCA full adder structures based on cell interaction. Our proposed full adders encompass preference aspects of QCA design

such as a low number of cells used

low latency

and small area occupation. Also

the proposed structures have been expanded to larger circuits

including a 4-bit ripple carry adder (RCA)

a 4-bit ripple borrow subtractor (RBS)

an add/sub circuit

and a 2-bit array multiplier. All designs were simulated and verified using QCA Designer-E version 2.2. This tool can estimate the energy dissipation as well as evaluate the performance of the circuits. Simulation results showed that the proposed designs are efficient in complexity

area

latency

cost

and energy dissipation.

关键词

量子点元胞自动机 (QCA)全加器行波进位加法器 (RCA)加/减电路乘数

Keywords

Quantum-dot cellular automata (QCA)Full adderRipple carry adder (RCA)Add/sub circuitMultiplier

references

Abdullah-Al-Shafi , Bahar AN, 2018. An architecture of 2-dimensional 4-dot 2-electron QCA full adder and subtractor with energy dissipation study. Act Pass Electron Compon, 2018:5062960. https://doi.org/10.1155/2018/5062960https://doi.org/10.1155/2018/5062960

Adelnia Y, Rezai A, 2019. A novel adder circuit design in quantum-dot cellular automata technology. Int J Theor Phys, 58(1):184-200. https://doi.org/10.1007/s10773-018-3922-0https://doi.org/10.1007/s10773-018-3922-0

Ahmadpour SS, Mosleh M, Heikalabad SR, 2018. A revolution in nanostructure designs by proposing a novel QCA full-adder based on optimized 3-input XOR. Phys B Condens Matter, 550:383-392. https://doi.org/10.1016/j.physb.2018.09.029https://doi.org/10.1016/j.physb.2018.09.029

Arani IE, Rezai A, 2018. Novel circuit design of serial-parallel multiplier in quantum-dot cellular automata technology. J Comput Electron, 17(4):1771-1779. https://doi.org/10.1007/s10825-018-1220-yhttps://doi.org/10.1007/s10825-018-1220-y

Babaie S, Sadoghifar A, Bahar AN, 2019. Design of an efficient multilayer arithmetic logic unit in quantum-dot cellular automata (QCA). IEEE Trans Circ Syst II Expr Briefs, 66(6):963-967. https://doi.org/10.1109/TCSII.2018.2873797https://doi.org/10.1109/TCSII.2018.2873797

Balali M, Rezai A, 2018. Design of low-complexity and high-speed coplanar four-bit ripple carry adder in QCA technology. Int J Theor Phys, 57(7):1948-1960. https://doi.org/10.1007/s10773-018-3720-8https://doi.org/10.1007/s10773-018-3720-8

Blair E, 2019. Electric-field inputs for molecular quantum-dot cellular automata circuits. IEEE Trans Nanotechnol, 18:453-460. https://doi.org/10.1109/TNANO.2019.2910823https://doi.org/10.1109/TNANO.2019.2910823

Cesar TF, Vieira LFM, Vieira MAM, et al., 2020. Cellular automata-based byte error correction in QCA. Nano Commun Netw, 23:100278. https://doi.org/10.1016/j.nancom.2019.100278https://doi.org/10.1016/j.nancom.2019.100278

Das JC, De D, 2017. Reversible binary subtractor design using quantum dot-cellular automata. Front Inform Technol Electron Eng, 18(9):1416-1429. https://doi.org/10.1631/FITEE.1600999https://doi.org/10.1631/FITEE.1600999

Debnath B, Das JC, De D, 2019. Nanoscale cryptographic architecture design using quantum-dot cellular automata. Front Inform Technol Electron Eng, 20(11):1578-1586. https://doi.org/10.1631/FITEE.1800458https://doi.org/10.1631/FITEE.1800458

Erniyazov S, Jeon JC, 2019. Carry save adder and carry look ahead adder using inverter chain based coplanar QCA full adder for low energy dissipation. Microelectron Eng, 211:37-43. https://doi.org/10.1016/j.mee.2019.03.015https://doi.org/10.1016/j.mee.2019.03.015

Gassoumi I, Touil L, Mtibaa A, 2021. An efficient design of QCA full-adder-subtractor with low power dissipation. J Electr Comput Eng, 2021:8856399. https://doi.org/10.1155/2021/8856399https://doi.org/10.1155/2021/8856399

Hasani B, Navimipour NJ, 2021. A new design of a carry-save adder based on quantum-dot cellular automata. Iran J Sci Technol Trans Electr Eng, 45(3):993-999. https://doi.org/10.1007/s40998-020-00395-5https://doi.org/10.1007/s40998-020-00395-5

Heikalabad SR, Asfestani MN, Hosseinzadeh M, 2018. A full adder structure without cross-wiring in quantum-dot cellular automata with energy dissipation analysis. J Supercomput, 74(5):1994-2005. https://doi.org/10.1007/s11227-017-2206-4https://doi.org/10.1007/s11227-017-2206-4

Heikalabad SR, Salimzadeh F, Barughi YZ, 2020. A unique three-layer full adder in quantum-dot cellular automata. Comput Electr Eng, 86:106735. https://doi.org/10.1016/j.compeleceng.2020.106735https://doi.org/10.1016/j.compeleceng.2020.106735

Joy UB, Chakraborty S, Tasnim S, et al., 2021. Design of an area efficient quantum dot cellular automata based full adder cell having low latency. 2nd Int Conf on Robotics, Electrical and Signal Processing Techniques, p.689-693. https://doi.org/10.1109/ICREST51555.2021.9331135https://doi.org/10.1109/ICREST51555.2021.9331135

Lent CS, Tougaw PD, Porod W, et al., 1993. Quantum cellular automata. Nanotechnology, 4(1):49. https://doi.org/10.1088/0957-4484/4/1/004https://doi.org/10.1088/0957-4484/4/1/004

Liu WQ, Lu L, O'Neill M, et al., 2014. A first step toward cost functions for quantum-dot cellular automata designs. IEEE Trans Nanotechnol, 13(3):476-487. https://doi.org/10.1109/TNANO.2014.2306754https://doi.org/10.1109/TNANO.2014.2306754

Maharaj J, Muthurathinam S, 2020. Effective RCA design using quantum dot cellular automata. Microprocess Microsyst, 73:102964. https://doi.org/10.1016/j.micpro.2019.102964https://doi.org/10.1016/j.micpro.2019.102964

Majeed AH, Zainal MSB, Alkaldy E, et al., 2020. Full adder circuit design with novel lower complexity XOR gate in QCA technology. Trans Electr Electron Mater, 21(2):198-207. https://doi.org/10.1007/s42341-019-00166-yhttps://doi.org/10.1007/s42341-019-00166-y

Mohammadi M, Mohammadi M, Gorgin S, 2016. An efficient design of full adder in quantum-dot cellular automata (QCA) technology. Microelectron J, 50:35-43. https://doi.org/10.1016/j.mejo.2016.02.004https://doi.org/10.1016/j.mejo.2016.02.004

Mosleh M, 2019. A novel full adder/subtractor in quantum-dot cellular automata. Int J Theor Phys, 58(1):221-246. https://doi.org/10.1007/s10773-018-3925-xhttps://doi.org/10.1007/s10773-018-3925-x

Navidi A, Sabbaghi-Nadooshan R, Dousti M, 2021. A creative concept for designing and simulating quaternary logic gates in quantum-dot cellular automata. Front Inform Technol Electron Eng, 22(11):1541-1550. https://doi.org/10.1631/FITEE.2000590https://doi.org/10.1631/FITEE.2000590

Safoev N, Jeon JC, 2020. Design of high-performance QCA incrementer/decrementer circuit based on adder/subtractor methodology. Microprocess Microsyst, 72:102927. https://doi.org/10.1016/j.micpro.2019.102927https://doi.org/10.1016/j.micpro.2019.102927

Salimzadeh F, Heikalabad SR, 2021. A full adder structure with a unique XNOR gate based on Coulomb interaction in QCA nanotechnology. Opt Quant Electron, 53(8):479. https://doi.org/10.1007/s11082-021-03127-zhttps://doi.org/10.1007/s11082-021-03127-z

Sasamal TN, Singh AK, Ghanekar U, 2018. Efficient design of coplanar ripple carry adder in QCA. IET Circ Dev Syst, 12(5):594-605. https://doi.org/10.1049/iet-cds.2018.0020https://doi.org/10.1049/iet-cds.2018.0020

Seyedi S, Navimipour NJ, 2018. An optimized design of full adder based on nanoscale quantum-dot cellular automata. Optik, 158:243-256. https://doi.org/10.1016/j.ijleo.2017.12.062https://doi.org/10.1016/j.ijleo.2017.12.062

Singh G, Raj B, Sarin RK, 2018. Fault-tolerant design and analysis of QCA-based circuits. IET Circ Dev Syst, 12(5):638-644. https://doi.org/10.1049/iet-cds.2017.0505https://doi.org/10.1049/iet-cds.2017.0505

Song ZX, Xie GJ, Cheng X, et al., 2020. An ultra-low cost multilayer RAM in quantum-dot cellular automata. IEEE Trans Circ Syst II Expr Briefs, 67(12):3397-3401. https://doi.org/10.1109/TCSII.2020.2988046https://doi.org/10.1109/TCSII.2020.2988046

Walus K, Dysart TJ, Jullien GA, et al., 2004. QCADesigner: a rapid design and simulation tool for quantum-dot cellular automata. IEEE Trans Nanotechnol, 3(1):26-31. https://doi.org/10.1109/TNANO.2003.820815https://doi.org/10.1109/TNANO.2003.820815

Wang L, Xie GJ, 2019. A power-efficient single layer full adder design in field-coupled QCA nanocomputing. Int J Theor Phys, 58(7):2303-2319. https://doi.org/10.1007/s10773-019-04121-8https://doi.org/10.1007/s10773-019-04121-8

Wang L, Xie GJ, 2020. A novel XOR/XNOR structure for modular design of QCA circuits. IEEE Trans Circ Syst II Expr Briefs, 67(12):3327-3331. https://doi.org/10.1109/TCSII.2020.2989496https://doi.org/10.1109/TCSII.2020.2989496

Xiao LR, Chen XX, Ying SY, 2012. Design of dual-edge triggered flip-flops based on quantum-dot cellular automata. J Zhejiang Univ-Sci C (Comput & Electron), 13(5):‍385-392. https://doi.org/10.1631/jzus.C1100287https://doi.org/10.1631/jzus.C1100287

Views

Downloads

CSCD

Alert me when the article has been cited

Submit

Tools

Publicity Resources

An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending^#

Related Author

Ayoub SADEGHI

Nabiollah SHIRI

Mahmood RAFIEE

Mahsa TAHGHIGH

Related Institution

Department of Electrical Engineering, Shiraz Branch, Islamic Azad University

Address：Zhejiang University Press, 148 Tianmushan Road, Hangzhou, China Postal code：310028
Tel：+86-571-88273162 Email：fitee@zju.edu.cn
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰