Design of dual-edge triggered flip-flops based on quantum-dot cellular automata

Lin-rong XIAO; Xie-xiong CHEN; Shi-yan YING

doi:10.1631/jzus.C1100287

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Design of dual-edge triggered flip-flops based on quantum-dot cellular automata

Electronic Engineering | Updated：2022-12-09

- Design of dual-edge triggered flip-flops based on quantum-dot cellular automata
- Design of dual-edge triggered flip-flops based on quantum-dot cellular automata
- Frontiers of Information Technology & Electronic Engineering Vol. 13, Issue 5, Pages: 385-392(2012)
- Affiliations：
  
  1.Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
  2.Department of Electrical and Electronic Engineering, Jiaxing University, Jiaxing 314001, China
  3.College of Information Engineering, Zhejiang University of Technology, Hangzhou 310032, China
- Author bio：
  
  Lin-rong XIAO, E-mail: xiaolr@126.com
- Funds：
- DOI：10.1631/jzus.C1100287
  CLC： TN79
- Received：07 October 2011，
  
  Revised：2012-;4-11，
  
  Published：2012-05
- Accepted：
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Lin-rong XIAO, Xie-xiong CHEN, Shi-yan YING. Design of dual-edge triggered flip-flops based on quantum-dot cellular automata[J]. Frontiers of Information Technology & Electronic Engineering, 2012, 13(5): 385-392.
DOI：

Lin-rong XIAO, Xie-xiong CHEN, Shi-yan YING. Design of dual-edge triggered flip-flops based on quantum-dot cellular automata[J]. Frontiers of Information Technology & Electronic Engineering, 2012, 13(5): 385-392. DOI： 10.1631/jzus.C1100287.

摘要

Abstract

Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal–oxide–semiconductor (CMOS) due to QCA's inherent merits. Many interesting QCA-based logic circuits with smaller feature size

higher operating frequency

and lower power consumption than CMOS have been presented. However

QCA is limited in its sequential circuit design with high performance flip-flops. Based on a brief introduction of QCA and dual-edge triggered (DET) flip-flop

we propose two original QCA-based D and JK DET flip-flops

offering the same data throughput of corresponding single-edge triggered (SET) flip-flops at half the clock pulse frequency. The logic functionality of the two proposed flip-flops is verified with the QCADesigner tool. All the proposed QCA-based DET flip-flops show higher performance than their SET counterparts in terms of data throughput. Furthermore

compared with a previous DET D flip-flop

the number of cells

covered area

and time delay of the proposed DET D flip-flop are reduced by 20.5%

23.5%

and 25%

respectively. By using a lower clock pulse frequency

the proposed DET flip-flops are promising for constructing QCA sequential circuits and systems with high performance.

关键词

Keywords

references

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