基于量子原胞自动机的纳米通信可逆低功耗奇偶生成器与奇偶校验器设计

Jadav Chandra DAS; Debashis DE

doi:10.1631/FITEE.1500079

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基于量子原胞自动机的纳米通信可逆低功耗奇偶生成器与奇偶校验器设计

常规文章 | Updated：2022-05-19

- 基于量子原胞自动机的纳米通信可逆低功耗奇偶生成器与奇偶校验器设计
- Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication
- 信息与电子工程前沿（英文） 2016年17卷第3期页码：224-236
- Affiliations：
  
  1Department of Computer Science and Engineering, West Bengal University of Technology, Kolkata 700064, India
  2Department of Physics, University of Western Australia, Crawley WA 6009, Australia
- Author bio：
  
  E-mail: jadav2u@gmail.com
  E-mail: dr.debashis.de@gmail.com
- Funds：
  
  Project supported by the University Grants Commission of India (No.41-631/2012 (S.R.))
- DOI：10.1631/FITEE.1500079
  中图分类号： TN91
- 收稿：2015-03-15，
  
  录用：2015-9-8，
  
  纸质出版：2016-03
- Accepted：
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基于量子原胞自动机的纳米通信可逆低功耗奇偶生成器与奇偶校验器设计[J]. 信息与电子工程前沿（英文）, 2016,17(3):224-236.

Jadav Chandra DAS, Debashis DE. Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication[J]. Frontiers of Information Technology & Electronic Engineering, 2016, 17(3): 224-236.
基于量子原胞自动机的纳米通信可逆低功耗奇偶生成器与奇偶校验器设计[J]. 信息与电子工程前沿（英文）, 2016,17(3):224-236. DOI： 10.1631/FITEE.1500079.

Jadav Chandra DAS, Debashis DE. Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication[J]. Frontiers of Information Technology & Electronic Engineering, 2016, 17(3): 224-236. DOI： 10.1631/FITEE.1500079.

摘要

目的

量子原胞自动机（QCA）是可逆计算领域的新兴方向。QCA可用于设计纳米级别的电路。在纳米通信领域，接收信号差错检测及校正是一个重要环节。同时，器件密度和功率耗散是纳米通信系统的关键问题。本文利用QCA的低器件密度和超低功耗特性，助力低功耗微纳级别可逆奇偶发生与校验器的设计。

创新点

基于QCA，第一次实现了使用费曼门的可逆低功耗奇偶生成器和奇偶校验器设计。

方法

基于本文提出的奇偶生成器和奇偶校验器电路，设计了一种纳米通信系统，并研究了传输中接收信号的差错检测。1.在QCA中设计可逆费曼门；2.在等量子成本的基础上，使用费曼门实现可逆奇偶生成与可逆奇偶校验电路；3.在相同量子成本和无用值的基础上，使用可逆奇偶生成器与校验器设计纳米通信系统；4.首次在QCA中实现可逆奇偶生成器、奇偶校验器与纳米通信电路；5.对可逆电路及其QCA布局进行量子成本分析；6.在面积、延迟和胞元计数等方面比对所述QCA费曼门与现有费曼门电路；7.估算所述设计的能量耗散；8.使用热随机性，观察输出胞元的极性，测量电路的可靠性。

结论

本文所提出的QCA费曼门在面积、原胞计数和延迟方面，超过了现有费曼门的指标水平。通过计算、比对传统可逆电路及其相应的QCA布局，证明QCA电路具有极低的量子成本。通过估计QCA电路的功率耗散，证明QCA微纳器件是可逆电路的可行平台。通过在热随机性下分析QCA电路的可靠性，证明所述电路的工作有效性。通过比对仿真结果与理论值，证明所述电路的精度。所述电路可以用于设计更为复杂的低功率微纳无损耗纳米通信系统（例如微纳发射器和微纳接收器）。

Abstract

Quantum-dot cellular automata (QCA) is an emerging area of research in reversible computing. It can be used to design nanoscale circuits. In nanocommunication

the detection and correction of errors in a received message is a major factor. Besides

device density and power dissipation are the key issues in the nanocommunication architecture. For the first time

QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gate have been achieved in this study. Using the proposed parity generator and parity checker circuit

a nanocommunication architecture is proposed. The detection of errors in the received message during transmission is also explored. The proposed QCA Feynman gate outshines the existing ones in terms of area

cell count

and delay. The quantum costs of the proposed conventional reversible circuits and their QCA layouts are calculated and compared

which establishes that the proposed QCA circuits have very low quantum cost compared to conventional designs. The energy dissipation by the layouts is estimated

which ensures the possibility of QCA nano-device serving as an alternative platform for the implementation of reversible circuits. The stability of the proposed circuits under thermal randomness is analyzed

showing the operational efficiency of the circuits. The simulation results of the proposed design are tested with theoretical values

showing the accuracy of the circuits. The proposed circuits can be used to design more complex low-power nanoscale lossless nanocommunication architecture such as nano-transmitters and nano-receivers.

关键词

Keywords

references

H Aghababa , , , B Forouzandeh , , , A Afzali-Kusha . . High-performance low-leakage regions of nano-scaled CMOS digital gates under variations of threshold voltage and mobility . . J. Zhejiang Univ.-Sci. C (Comput. & Electron.) , , 2012 . . 13 ( ( 6 ): ): 460 - - 471 . . DOI: 10.1631/jzus.C1100273 http://doi.org/10.1631/jzus.C1100273 . .

P Agrawal , , , B Ghosh . . Innovative design methodologies in quantum-dot cellular automata . . Int. J. Circ. Theory Appl. , , 2015 . . 43 ( ( 2 ): ): 253 - - 262 . . DOI: 10.1002/cta.1936 http://doi.org/10.1002/cta.1936 . .

R Akter , , , N Islam , , , S Waheed . . Implementation of reversible logic gate in quantum dot cellular automata . . Int. J. Comput. Appl. , , 2015 . . 109 ( ( 1 ): ): 41 - - 44 . . DOI: 10.5120/19155-0591 http://doi.org/10.5120/19155-0591 . .

P Biswas , , , N Gupta , , , N Patidar . . Basic reversible logic gates and its QCA implementation . . Int. J. Eng. Res. Appl. , , 2014 . . 4 ( ( 6 ): ): 12 - - 16 . . . .

J.C Das , , , D De . . Quantum Dot-Cellular Automata based cipher text design for nano-communication . . 2012 . . Int. Conf. on Radar, Communication and Computing . . 244 - - 229 . . DOI: 10.1109/ICRCC.2012.6450583 http://doi.org/10.1109/ICRCC.2012.6450583 . .

J.C Das , , , D De . . Reversible binary to grey and grey to binary code converter using QCA . . IETE J. Res. , , 2015a . . 61 ( ( 3 ): ): 223 - - 229 . . DOI: 10.1080/03772063.2015.1018845 http://doi.org/10.1080/03772063.2015.1018845 . .

J.C Das , , , D De . . Reversible comparator design using quantum dot-cellular automata . . 2015b . . IETE J. Res., in press . . DOI: 10.1080/03772063.2015.1088407 http://doi.org/10.1080/03772063.2015.1088407 . .

J.C Das , , , B Debnath , , , D De . . Image steganography using quantum dot cellular automata . . Quant. Matter , , 2015 . . 4 ( ( 5 ): ): 504 - - 517 . . DOI: 10.1166/qm.2015.1225 http://doi.org/10.1166/qm.2015.1225 . .

K Das , , , D De . . Characterization, test and logic synthesis of novel conservative & reversible logic gates for QCA . . Int. J. Nanosci. , , 2010 . . 9 ( ( 3 ): ): 201 - - 214 . . DOI: 10.1142/S0219581X10006594 http://doi.org/10.1142/S0219581X10006594 . .

K Das , , , D De . . Characterization, applicability and defect analysis for tiles nanostructure of quantum dot cellular automata . . Mol. Simul. , , 2011 . . 37 ( ( 3 ): ): 210 - - 225 . . DOI: 10.1080/08927022.2010.536543 http://doi.org/10.1080/08927022.2010.536543 . .

K Das , , , D De , , , M De . . Realisation of semiconductor ternary quantum dot cellular automata . . IET Micro Nano Lett. , , 2013 . . 8 ( ( 5 ): ): 258 - - 263 . . DOI: 10.1049/mnl.2012.0618 http://doi.org/10.1049/mnl.2012.0618 . .

W.N.N Hung , , , X Song , , , G Yang , , , 等 . . Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis . . IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. , , 2006 . . 25 ( ( 9 ): ): 1652 - - 1663 . . DOI: 10.1109/TCAD.2005.858352 http://doi.org/10.1109/TCAD.2005.858352 . .

ITRS (International Technology Roadmap for Semiconductors) , , 2005 . . Available from: http://www.itrs.net http://www.itrs.net . .

D Kunalan , , , C.L Cheong , , , C.F Chau , , , 等 . . Design of a 4-bit adder using reversible logic in quantum-dot cellular automata (QCA) . . IEEE Int. Conf. on SemiconductorElectronics , , 2014 . . DOI: 10.1109/SMELEC.2014.6920795 http://doi.org/10.1109/SMELEC.2014.6920795 . .

C Lent , , , P Tougaw . . A device architecture for computing with quantum dots . . Proc. IEEE , , 1997 . . 85 ( ( 4 ): ): 541 - - 557 . . DOI: 10.1109/5.573740 http://doi.org/10.1109/5.573740 . .

W Liu , , , S Srivastava , , , L Lu , , , 等 . . Are QCA cryptographic circuits resistant to power analysis attack? . . IEEE TransNanotechnol. , , 2012 . . 11 ( ( 6 ): ): 1239 - - 1251 . . DOI: 10.1109/TNANO.2012.2222663 http://doi.org/10.1109/TNANO.2012.2222663 . .

X Ma . . Physical/Biochemical Inspired Computing Models for Reliable Nano-Technology Systems , , 2008 . . : : Boston, Massachusetts, United States Northeastern University , , PhD Thesis . .

M.M Mano , , , M.D Ciletti . . Digital Design with an Introduction to Verilog HDL (5th Ed.) , , 2011 . . : : India Pearson Education , , . .

V.A Mardiris , , , I.G Karafyllidis . . Design and simulation of modular 2n to 1 quantum-dot cellular automata (QCA) multiplexers . . Int. J. Circ. Theory Appl. , , 2010 . . 38 ( ( 8 ): ): 771 - - 785 . . DOI: 10.1002/cta.595 http://doi.org/10.1002/cta.595 . .

Z Mohammadi , , , M Mohammadi . . Implementing a one-bit reversible full adder using quantum-dot cellular automata . . Quant. Inform. Process. , , 2014 . . 13 ( ( 9 ): ): 2127 - - 2147 . . DOI: 10.1007/s11128-014-0782-2 http://doi.org/10.1007/s11128-014-0782-2 . .

A.O Orlov , , , I Amlani , , , G.H Bernstein , , , 等 . . Realization of a functional cell for quantum-dot cellular automata . . Science , , 1997 . . 277 ( ( 5328 ): ): 928 - - 930 . . DOI: 10.1126/science.277.5328.928 http://doi.org/10.1126/science.277.5328.928 . .

V Pudi , , , K Sridharan . . Efficient design of a hybrid adder in quantum-dot cellular automata . . IEEE Trans. VLSI Syst. , , 2011 . . 19 ( ( 9 ): ): 1535 - - 1548 . . DOI: 10.1109/TVLSI.2010.2054120 http://doi.org/10.1109/TVLSI.2010.2054120 . .

M.A Rahman , , , F Khatun , , , A Sarkar , , , 等 . . Design and implementation of Feynman gate in quantum-dot cellular automata (QCA) . . Int. J. Comput. Sci. Iss. , , 2013 . . 10 ( ( 4 ): ): 167 - - 170 . . . .

S Shabeena , , , J Pathak . . Design and verification of reversible logic gates using quantum dot cellular automata . . Int. J. Comput. Appl. , , 2015 . . 114 ( ( 4 ): ): 39 - - 42 . . DOI: 10.5120/19970-1846 http://doi.org/10.5120/19970-1846 . .

S Sheikhfaal , , , S Angizi , , , S Sarmadi , , , 等 . . Designing efficient QCA logical circuits with power dissipation analysis . . Microelectron. J. , , 2015 . . 46 ( ( 6 ): ): 462 - - 471 . . DOI: 10.1016/j.mejo.2015.03.016 http://doi.org/10.1016/j.mejo.2015.03.016 . .

D.S Silva , , , L.H.B Sardinha , , , M.A.M Vieira , , , 等 . . Robust serial nanocommunication with QCA . . IEEE Trans. Nanotechnol. , , 2015 . . 14 ( ( 3 ): ): 464 - - 472 . . DOI: 10.1109/TNANO.2015.2407696 http://doi.org/10.1109/TNANO.2015.2407696 . .

J.A Smolin , , , D.P DiVincenzo . . Five two-bit quantum gates are sufficient to implement the quantum Fredkin gate . . Phys. Rev. A , , 1996 . . 53 ( ( 4 ): ): 2855 - - 2856 . . DOI: 10.1103/PhysRevA.53.2855 http://doi.org/10.1103/PhysRevA.53.2855 . .

S Srivastava , , , A Asthana , , , S Bhanja , , , 等 . . QCAPro— an error power estimation tool for QCA circuit design . . 2011 . . Proc. IEEE Int. Symp. on Circuits and Systems . . 2377 - - 2380 . . DOI: 10.1109/ISCAS.2011.5938081 http://doi.org/10.1109/ISCAS.2011.5938081 . .

T Toffoli . . Reversible Computing , , 1980 . . : : Tech Memo MIT/LCS/TM-151, MIT Lab for Computer Science. , , . .

K Walus , , , T.J Dysart , , , G.A Jullien , , , 等 . . QCADesigner: a rapid design and simulation tool for quantum-dot cellular automata . . IEEE Trans. Nanotechnol. , , 2004 . . 3 ( ( 1 ): ): 26 - - 31 . . DOI: 10.1109/TNANO.2003.820815 http://doi.org/10.1109/TNANO.2003.820815 . .

L.R Xiao , , , X.X Chen , , , S.Y Ying . . Design of dual-edge triggered flip-flops based on quantum-dot cellular automata . . J. Zhejiang Univ.-Sci. C (Comput. & Electron.) , , 2012 . . 13 ( ( 5 ): ): 385 - - 392 . . DOI: 10.1631/jzus.C1100287 http://doi.org/10.1631/jzus.C1100287 . .

X Yang , , , L Cai , , , H Huang , , , 等 . . A comparative analysis and design of quantum-dot cellular automata memory cell architecture . . Int. J. Circ. Theory Appl. , , 2012 . . 40 ( ( 1 ): ): 93 - - 103 . . DOI: 10.1002/cta.710 http://doi.org/10.1002/cta.710 . .

R Zhang , , , K Walus , , , W Wang , , , 等 . . A method of majority logic reduction for quantum cellular automata . . IEEE Trans. Nanotechnol. , , 2004 . . 3 ( ( 4 ): ): 443 - - 450 . . DOI: 10.1109/TNANO.2004.834177 http://doi.org/10.1109/TNANO.2004.834177 . .

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