基于非易失存储器的版本化进程细粒度容错

张文喆; 卢凯; 王小平

doi:10.1631/FITEE.1601477

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基于非易失存储器的版本化进程细粒度容错

常规文章 | Updated：2022-05-19

- 基于非易失存储器的版本化进程细粒度容错
- Versionized process based on non-volatile random-access memory for fine-grained fault tolerance
- 信息与电子工程前沿（英文） 2018年19卷第2期页码：192-205
- Affiliations：
  
  Science and Technology on Parallel and Distributed Processing Laboratory, College of Computer, National University of Defense Technology, Changsha 410073, China
- Author bio：
  
  Kai LU, E-mail: lukainudt@163.com
- Funds：
  
  Project supported by the National High-Tech R & D Program (863) of China (Nos. 2012AA01A301, 2012AA010901, 2012AA010303, and 2015AA01A301), the Program for New Century Excellent Talents in University, the National Natural Science Foundation of China (Nos. 61272142, 61402492, 61402486, 61379146, and 61272483), the Laboratory Pre-research Fund (No. 9140C810106150C81001), and the Open Project of the State Key Laboratory of High-End Server & Storage Technology (No. 2014HSSA01)
- DOI：10.1631/FITEE.1601477
  中图分类号： TP316
- 收稿：2016-08-16，
  
  修回：2018-;2-15，
  
  纸质出版：2018-02
- Accepted：
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张文喆, 卢凯, 王小平. 基于非易失存储器的版本化进程细粒度容错[J]. 信息与电子工程前沿（英文）, 2018,19(2):192-205.

Wen-zhe ZHANG, Kai LU, Xiao-ping WANG. Versionized process based on non-volatile random-access memory for fine-grained fault tolerance[J]. Frontiers of Information Technology & Electronic Engineering, 2018, 19(2): 192-205.
张文喆, 卢凯, 王小平. 基于非易失存储器的版本化进程细粒度容错[J]. 信息与电子工程前沿（英文）, 2018,19(2):192-205. DOI： 10.1631/FITEE.1601477.

Wen-zhe ZHANG, Kai LU, Xiao-ping WANG. Versionized process based on non-volatile random-access memory for fine-grained fault tolerance[J]. Frontiers of Information Technology & Electronic Engineering, 2018, 19(2): 192-205. DOI： 10.1631/FITEE.1601477.

摘要

新型非易失存储器（NVRAM）提供的字节粒度持久且非易失新特性，将有力支持新型容错技术的设计。提出一个基于NVRAM的新型容错进程模型--版本化进程（versionized process，VerP）。该进程模型通过在传统软硬件之间引入一个软件中间层，将软硬件解耦合，在NVRAM上重新组织进程所有数据，从而支持进程在NVRAM的天然容错。进一步，赋予进程中每个数据一个版本号，通过更新版本号实现进程非易失数据的一致性更新。与传统检查点机制相比，VerP可高效支持细粒度容错。

Abstract

Non-volatile random-access memory (NVRAM) technology is maturing rapidly and its byte-persistence feature allows the design of new and efficient fault tolerance mechanisms. In this paper we propose the versionized process (VerP)

a new process model based on NVRAM that is natively non-volatile and fault tolerant. We introduce an intermediate software layer that allows us to run a process directly on NVRAM and to put all the process states into NVRAM

and then propose a mechanism to versionize all the process data. Each piece of the process data is given a special version number

which increases with the modification of that piece of data. The version number can effectively help us trace the modification of any data and recover it to a consistent state after a system crash. Compared with traditional checkpoint methods

our work can achieve fine-grained fault tolerance at very little cost.

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