基于脉冲分忆抗桥电路的分数阶记忆性神经突触加权

蒲亦非; 余波; 何秋燕; 袁晓

doi:10.1631/FITEE.2000085

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基于脉冲分忆抗桥电路的分数阶记忆性神经突触加权

常规文章 | Updated：2022-06-06

- 基于脉冲分忆抗桥电路的分数阶记忆性神经突触加权
- Fractional-order memristive neural synaptic weighting achieved by pulse-based fracmemristor bridge circuit
- 信息与电子工程前沿（英文） 2021年22卷第6期页码：862-876
- Affiliations：
  
  College of Computer Science, Sichuan University, Chengdu 610065, China
  School of Physics and Engineering Technology, Chengdu Normal University, Chengdu 611130, China
  College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China
- Author bio：
  
  Qiuyan HE, E-mail: heqiuyan789@163.com
  Xiao YUAN, E-mail: yuanxiao@scu.edu.cn
- Funds：
  
  Project supported by the National Key Research and Development Program of China (No. 2018YFC0830300) and the National Natural Science Foundation of China (No. 61571312)
- DOI：10.1631/FITEE.2000085
  中图分类号： TP183;TN6
- 收稿：2020-02-23，
  
  修回：2021-;5-;8，
  
  纸质出版：2021-06
- Accepted：
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蒲亦非, 余波, 何秋燕, 等. 基于脉冲分忆抗桥电路的分数阶记忆性神经突触加权[J]. 信息与电子工程前沿（英文）, 2021,22(6):862-876.

Yifei PU, Bo YU, Qiuyan HE, et al. Fractional-order memristive neural synaptic weighting achieved by pulse-based fracmemristor bridge circuit[J]. Frontiers of Information Technology & Electronic Engineering, 2021, 22(6): 862-876.
蒲亦非, 余波, 何秋燕, 等. 基于脉冲分忆抗桥电路的分数阶记忆性神经突触加权[J]. 信息与电子工程前沿（英文）, 2021,22(6):862-876. DOI： 10.1631/FITEE.2000085.

Yifei PU, Bo YU, Qiuyan HE, et al. Fractional-order memristive neural synaptic weighting achieved by pulse-based fracmemristor bridge circuit[J]. Frontiers of Information Technology & Electronic Engineering, 2021, 22(6): 862-876. DOI： 10.1631/FITEE.2000085.

摘要

提出一种新颖的分数阶记忆性神经突触加权电路。与以往大多数整数阶神经突触加权电路不同，该分数阶记忆性神经突触加权电路具有许多重要优点。由于忆阻的概念已从经典的整数阶忆阻推广到分数阶忆阻（分忆抗），分忆抗能否实现分数阶记忆性突触成为一个具有挑战性的理论问题。本文研究利用脉冲分忆抗桥电路实现的分数阶记忆性神经突触加权电路的特点。首先，利用基于脉冲的分忆抗桥电路设计分数阶记忆性神经突触加权电路结构。其次，从数学上证明分数阶记忆性神经突触加权电路的分数阶学习能力。最后，通过实验研究分数阶记忆性神经突触加权电路的电特性。分数阶记忆性神经突触加权电路在解释学习和记忆基础的细胞机制方面具有很强的能力，优于传统的整数阶神经突触加权电路，是该电路的主要优势。

Abstract

We propose a novel circuit for the fractional-order memristive neural synaptic weighting (FMNSW). The introduced circuit is different from the majority of the previous integer-order approaches and offers important advantages. Since the concept of memristor has been generalized from the classic integer-order memristor to the fractional-order memristor (fracmemristor)

a challenging theoretical problem would be whether the fracmemristor can be employed to implement the fractional-order memristive synapses or not. In this research

characteristics of the FMNSW

realized by a pulse-based fracmemristor bridge circuit

are investigated. First

the circuit configuration of the FMNSW is explained using a pulse-based fracmemristor bridge circuit. Second

the mathematical proof of the fractional-order learning capability of the FMNSW is analyzed. Finally

experimental work and analyses of the electrical characteristics of the FMNSW are presented. Strong ability of the FMNSW in explaining the cellular mechanisms that underlie learning and memory

which is superior to the traditional integer-order memristive neural synaptic weighting

is considered a major advantage for the proposed circuit.

关键词

Keywords

references

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