用于设计量子点元胞自动机算术电路的可扩展 1 位全加器

Hamideh KHAJEHNASIR-JAHROMI; Pooya TORKZADEH; Massoud DOUSTI

doi:10.1631/FITEE.2100287

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用于设计量子点元胞自动机算术电路的可扩展 1 位全加器

常规文章 | Updated：2022-09-08

- 用于设计量子点元胞自动机算术电路的可扩展 1 位全加器
- Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits
- 信息与电子工程前沿(英文版) 2022年23卷第8期页码：1264-1276
- Affiliations：
  
  Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran147789 3855, Iran
- Author bio：
  
  h.khajehnasir@srbiau.ac.ir
  ‡Corresponding authors
  m_dousti@srbiau.ac.ir
- Funds：
- DOI：10.1631/FITEE.2100287
  中图分类号： TN79
- 收稿：2021-06-17，
  
  修回：2021-09-30，
  
  纸质出版：2022-08-23
- Accepted：
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Hamideh KHAJEHNASIR-JAHROMI, Pooya TORKZADEH, Massoud DOUSTI. 用于设计量子点元胞自动机算术电路的可扩展 1 位全加器[J]. 信息与电子工程前沿(英文版), 2022,23(8):1264-1276.

Hamideh KHAJEHNASIR-JAHROMI, Pooya TORKZADEH, Massoud DOUSTI. Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits[J]. Frontiers of Information Technology & Electronic Engineering, 2022, 23(8): 1264-1276.
Hamideh KHAJEHNASIR-JAHROMI, Pooya TORKZADEH, Massoud DOUSTI. 用于设计量子点元胞自动机算术电路的可扩展 1 位全加器[J]. 信息与电子工程前沿(英文版), 2022,23(8):1264-1276. DOI： 10.1631/FITEE.2100287.

Hamideh KHAJEHNASIR-JAHROMI, Pooya TORKZADEH, Massoud DOUSTI. Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits[J]. Frontiers of Information Technology & Electronic Engineering, 2022, 23(8): 1264-1276. DOI： 10.1631/FITEE.2100287.

摘要

近年来，在纳米尺度上使用互补金属氧化物半导体（CMOS）技术设计逻辑电路面临着各种挑战。漏电流、短效应沟道和高能量耗散是一些亟待解决的问题。量子点元胞自动机（QCA）代表了未来可能替代CMOS的一种合适选择，因为与标准CMOS相比，它消耗的能量微不足道。设计算术电路关键是基于1位全加器的结构。低复杂度的全加器模块有利于开发各种复杂结构。本文介绍了基于单元交互的可扩展1位QCA全加器结构。我们提出的全加器包含QCA设计偏好，例如使用的单元数量少、延迟低和占用面积小。此外，所提结构已扩展到更大的电路，包括4位行波进位加法器（RCA）、4位行波借位减法器（RBS）、加/减电路和2位阵列乘法器。所有设计均使用 QCA Designer-E 2.2版软件进行仿真和验证。该工具可以估计能量消耗以及评估电路的性能。仿真结果表明，所提设计在复杂度、面积、延迟、成本和能量消耗方面都是有效的。

Abstract

Designing logic circuits using complementary metal-oxide-semiconductor (CMOS) technology at the nano scale has been faced with various challenges recently. Undesirable leakage currents

the short-effect channel

and high energy dissipation are some of the concerns. Quantum-dot cellular automata (QCA) represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard CMOS. The key point of designing arithmetic circuits is based on the structure of a 1-bit full adder. A low-complexity full adder block is beneficial for developing various intricate structures. This paper represents scalable 1-bit QCA full adder structures based on cell interaction. Our proposed full adders encompass preference aspects of QCA design

such as a low number of cells used

low latency

and small area occupation. Also

the proposed structures have been expanded to larger circuits

including a 4-bit ripple carry adder (RCA)

a 4-bit ripple borrow subtractor (RBS)

an add/sub circuit

and a 2-bit array multiplier. All designs were simulated and verified using QCA Designer-E version 2.2. This tool can estimate the energy dissipation as well as evaluate the performance of the circuits. Simulation results showed that the proposed designs are efficient in complexity

area

latency

cost

and energy dissipation.

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