以Matrix-3000为例研究面向裸金属加速器的异构多线程编程模型

方建滨; 张鹏; 黄春; 唐滔; 卢凯; 王睿伯; 王峥

doi:10.1631/FITEE.2200359

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以Matrix-3000为例研究面向裸金属加速器的异构多线程编程模型

常规文章 | Updated：2023-05-08

- 以Matrix-3000为例研究面向裸金属加速器的异构多线程编程模型
- Programming bare-metal accelerators with heterogeneous threading models: a case study of Matrix-3000
- 信息与电子工程前沿（英文） 2023年24卷第4期页码：509-520
- Affiliations：
  
  1.College of Computer Science and Technology, National University of Defense Technology, Changsha 410073, China
  2.School of Computing, University of Leeds, Leeds LS2 9JT, UK
- Author bio：
  
  †E-mail: j.fang@nudt.edu.cn
  zhangpeng13a@nudt.edu.cn
  ‡Corresponding author
- Funds：
  
  National Key Research and Development Program of China(2021YFB0300101);National Natural Science Foundation of China(61972408);UK Royal Society International Collaboration Grant
- DOI：10.1631/FITEE.2200359
  中图分类号： TP315
- 收稿：2022-08-27，
  
  录用：2022-10-19，
  
  纸质出版：2023-04-0
- Accepted：
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方建滨, 张鹏, 黄春, 等. 以Matrix-3000为例研究面向裸金属加速器的异构多线程编程模型[J]. 信息与电子工程前沿（英文）, 2023,24(4):509-520.

Jianbin FANG, Peng ZHANG, Chun HUANG, et al. Programming bare-metal accelerators with heterogeneous threading models: a case study of Matrix-3000[J]. Frontiers of Information Technology & Electronic Engineering, 2023, 24(4): 509-520.
方建滨, 张鹏, 黄春, 等. 以Matrix-3000为例研究面向裸金属加速器的异构多线程编程模型[J]. 信息与电子工程前沿（英文）, 2023,24(4):509-520. DOI： 10.1631/FITEE.2200359.

Jianbin FANG, Peng ZHANG, Chun HUANG, et al. Programming bare-metal accelerators with heterogeneous threading models: a case study of Matrix-3000[J]. Frontiers of Information Technology & Electronic Engineering, 2023, 24(4): 509-520. DOI： 10.1631/FITEE.2200359.

摘要

随着处理器设计转向使用专门的异构多核以避免功耗墙的影响，软件开发人员发现很难处理这些处理器系统的复杂性。以Matrix-3000为代表的新型处理器具有复杂的内存层次结构和处理器组织，是为下一代E级超级计算机设计的高性能处理器。本文分享了我们为Matrix-3000开发的并行编程模型及其支持编译器和库的经验。为了帮助软件开发，我们从头开始开发了一个针对Matrix-3000的软件栈，包括一个低层次的编程接口和一个高层次的OpenCL编译器。该低层次编程模型为使用Matrix-3000的裸金属加速器提供了原生编程支持，而高层次模型允许程序员使用OpenCL并行编程标准。我们详细介绍了该软件栈的设计选择，并强调了从开发系统软件中学到的经验教训，以实现裸金属加速器的高效程序编写和性能解锁。我们的编程模型已经被部署到一个E级原型系统的生产环境中。

Abstract

As the hardware industry moves toward using specialized heterogeneous many-core processors to avoid the effects of the power wall

software developers are finding it hard to deal with the complexity of these systems. In this paper

we share our experience of developing a programming model and its supporting compiler and libraries for Matrix-3000

which is designed for next-generation exascale supercomputers but has a complex memory hierarchy and processor organization. To assist its software development

we have developed a software stack from scratch that includes a low-level programming interface and a high-level OpenCL compiler. Our low-level programming model offers native programming support for using the bare-metal accelerators of Matrix-3000

while the high-level model allows programmers to use the OpenCL programming standard. We detail our design choices and highlight the lessons learned from developing system software to enable the programming of bare-metal accelerators. Our programming models have been deployed in the production environment of an exascale prototype system.

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references

Alfieri RA , 1994 . An efficient kernel-based implementation of POSIX threads . Proc USENIX Summer Technical Conf , p. 59 - 72 .

Arevalo A , Matinata RM , Pandian M , et al. , 2000 . Programming the cell broadband engine examples and best practices. ACM Workshop. Available from https://www.autodesk.com/research/publications/programming-the-cell-broadband https://www.autodesk.com/research/publications/programming-the-cell-broadband [Accessed on Aug. 25, 2022 ].

Fang JB , Varbanescu AL , Sips H , 2011 . A comprehensive performance comparison of CUDA and OpenCL . Int Conf on Parallel Processing , p. 216 - 225 . doi: 10.1109/ICPP.2011.45 http://doi.org/10.1109/ICPP.2011.45

Fang JB , Huang C , Tang T , et al. , 2020 . Parallel programming models for heterogeneous many-cores: a comprehensive survey . CCF Trans High Perform Comput , 2 ( 4 ): 382 - 400 . doi: 10.1007/s42514-020-00039-4 http://doi.org/10.1007/s42514-020-00039-4

Jääskeläinen P , de la Lama CS , Schnetter E , et al. , 2015 . pocl: a performance-portable OpenCL implementation . Int J Parall Program , 43 ( 5 ): 752 - 785 . doi: 10.1007/s10766-014-0320-y http://doi.org/10.1007/s10766-014-0320-y

Kudlur M , Mahlke S , 2008 . Orchestrating the execution of stream programs on multicore platforms . Proc 29 th ACM SIGPLAN Conf on Programming Language Design and Implementation , p. 114 - 124 . doi: 10.1145/1375581.1375596 http://doi.org/10.1145/1375581.1375596

Liao XK , Lu K , Yang CQ , et al. , 2018 . Moving from exascale to zettascale computing: challenges and techniques . Front Inform Technol Electron Eng , 19 ( 10 ): 1236 - 1244 . doi: 10.1631/FITEE.1800494 http://doi.org/10.1631/FITEE.1800494

Lu K , Wang YH , Guo Y , et al. , 2022 . MT-3000: a heterogeneous multi-zone processor for HPC . CCF Trans High Perform Comput , 4 ( 2 ): 150 - 164 . doi: 10.1007/s42514-022-00095-y http://doi.org/10.1007/s42514-022-00095-y

Owens JD , Luebke D , Govindaraju N , et al. , 2005 . A survey of general-purpose computation on graphics hardware . Proc 26 th Annual Conf of the European Association for Computer Graphics , p. 21 - 51 . doi: 10.2312/egst.20051043 http://doi.org/10.2312/egst.20051043

Owens JD , Houston M , Luebke D , et al. , 2008 . GPU computing . Proc IEEE , 96 ( 5 ): 879 - 899 . doi: 10.1109/JPROC.2008.917757 http://doi.org/10.1109/JPROC.2008.917757

Patterson D , 2018 . 50 years of computer architecture: from the mainframe CPU to the domain-specific TPU and the open RISC-V instruction set . IEEE Int Solid-State Circuits Conf , p. 27 - 31 . doi: 10.1109/ISSCC.2018.8310168 http://doi.org/10.1109/ISSCC.2018.8310168

Perez JM , Bellens P , Badia RM , et al. , 2007 . CellSs: making it easier to program the cell broadband engine processor . IBM J Res Dev , 51 ( 5 ): 593 - 604 . doi: 10.1147/rd.515.0593 http://doi.org/10.1147/rd.515.0593

Shen J , Fang JB , Sips H , et al. , 2012 . Performance gaps between OpenMP and OpenCL for multi-core CPUs . Proc 41 st Int Conf on Parallel Processing Workshops , p. 116 - 125 . doi: 10.1109/ICPPW.2012.18 http://doi.org/10.1109/ICPPW.2012.18

Trott CR , Lebrun-Grandié D , Arndt D , et al. , 2022 . Kokkos 3: programming model extensions for the exascale era . IEEE Trans Parall Distrib Syst , 33 ( 4 ): 805 - 817 . doi: 10.1109/TPDS.2021.3097283 http://doi.org/10.1109/TPDS.2021.3097283

Zhai JD , Chen WG , 2018 . A vision of post-exascale programming . Front Inform Technol Electron Eng , 19 ( 10 ): 1261 - 1266 . doi: 10.1631/FITEE.1800442 http://doi.org/10.1631/FITEE.1800442

Zhang P , Tang T , Fang J , et al. , 2018 . MOCL: an efficient OpenCL implementation for the Matrix-2000 architecture . Proc 15 th ACM Int Conf on Computing Frontiers , p. 26 - 35 . doi: 10.1145/3203217.3203244 http://doi.org/10.1145/3203217.3203244

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