一种基于MFMA的MPRM逻辑电路功耗优化方法

张梦雨; 何振学; 王伊瑾; 赵晓君; 张晓丹; 肖利民; 王翔

doi:10.1631/FITEE.2400513

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一种基于MFMA的MPRM逻辑电路功耗优化方法

常规文章 | Updated：2025-04-03

- 一种基于MFMA的MPRM逻辑电路功耗优化方法
  Enhanced Publication
- A power optimization approach for mixed polarity Reed–Muller logic circuits based on multi-strategy fusion memetic algorithm
- 信息与电子工程前沿(英文版) 2025年26卷第3期页码：415-426
- Affiliations：
  
  1.Intelligent Agricultural Equipment Research Institute, Hebei Agricultural University, Baoding 071001, China
  2.Key Laboratory of Agricultural Big Data of Hebei Province, Hebei Agricultural University, Baoding 071001, China
  3.School of Computer Science and Engineering, Beihang University, Beijing 100191, China
  4.School of Electronic Information Engineering, Beihang University, Beijing 100191, China
- Author bio：
  
  ‡Corresponding author
- Funds：
  
  the National Natural Science Foundation of China(62102130);Central Government Guides Local Science and Technology Development Fund Project, China(226Z0201G);Natural Science Foundation of Hebei Province, China(F2020204003;F2024204001);Science and Technology Research Projects of Higher Education Institutions in Hebei Province, China(QN2024138)
- DOI：10.1631/FITEE.2400513
  中图分类号： TP331.1
- 收稿：2024-06-14，
  
  修回：2024-09-26，
  
  纸质出版：2025-03
- Accepted：
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张梦雨, 何振学, 王伊瑾, 等. 一种基于MFMA的MPRM逻辑电路功耗优化方法[J]. 信息与电子工程前沿(英文版), 2025,26(3):415-426.

Mengyu ZHANG, Zhenxue HE, Yijin WANG, et al. A power optimization approach for mixed polarity Reed–Muller logic circuits based on multi-strategy fusion memetic algorithm[J]. Frontiers of Information Technology & Electronic Engineering, 2025, 26(3): 415-426.
张梦雨, 何振学, 王伊瑾, 等. 一种基于MFMA的MPRM逻辑电路功耗优化方法[J]. 信息与电子工程前沿(英文版), 2025,26(3):415-426. DOI： 10.1631/FITEE.2400513.

Mengyu ZHANG, Zhenxue HE, Yijin WANG, et al. A power optimization approach for mixed polarity Reed–Muller logic circuits based on multi-strategy fusion memetic algorithm[J]. Frontiers of Information Technology & Electronic Engineering, 2025, 26(3): 415-426. DOI： 10.1631/FITEE.2400513.

摘要

混合极性Reed–Muller（MPRM）逻辑电路功耗优化是一种典型的组合优化问题。现有功耗优化方法存在收敛速度慢、易陷入局部最优等问题，在实现最佳功耗方面的有效性十分有限。首先，本文提出一种多策略融合模因算法（MFMA），利用黑猩猩优化算法进行全局勘探，利用基于最优位置学习和自适应权重因子的浣熊优化算法（COA-OLA）进行局部探索，最后采用截断选择算法进行新种群选择。其次，基于MFMA提出一种MPRM逻辑电路功耗优化方法，通过寻找最佳极性配置，使得电路功耗最小化。基于MCNC基准电路的实验结果表明，与现有的功耗优化方法相比，本功耗优化方法有显著的改进。MFMA实现最高功耗优化率为72.30%，平均优化率为43.37%。同时，MFMA搜索解的速度更快且质量更好，验证了其在功耗优化方面的有效性和优越性。

Abstract

The power optimization of mixed polarity Reed‍–‍Muller (MPRM) logic circuits is a classic combinatorial optimization problem. Existing optimization approaches often suffer from slow convergence and a propensity to converge to local optima

limiting their effectiveness in achieving optimal power efficiency. First

we propose a novel multi-strategy fusion memetic algorithm (MFMA). MFMA integrates global exploration via the chimp optimization algorithm with local exploration using the coati optimization algorithm based on the optimal position learning and adaptive weight factor (COA-OLA)

complemented by population management through truncation selection. Second

leveraging MFMA

we propose a power optimization approach for MPRM logic circuits that searches for the best polarity configuration to minimize circuit power. Experimental results based on Microelectronics Center of North Carolina (MCNC) benchmark circuits demonstrate significant improvements over existing power optimization approaches. MFMA achieves a maximum power saving rate of 72.30% and an average optimization rate of 43.37%; it searches for solutions faster and with higher quality

validating its effectiveness and superiority in power optimization.

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references

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