A low drift curvature-compensated bandgap reference with trimming resistive circuit

Zhi-hua NING; Le-nian HE

doi:10.1631/jzus.C1000440

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A low drift curvature-compensated bandgap reference with trimming resistive circuit

电子工程 | Updated：2022-08-31

- A low drift curvature-compensated bandgap reference with trimming resistive circuit
- A low drift curvature-compensated bandgap reference with trimming resistive circuit
- 信息与电子工程前沿（英文） 2011年12卷第8期页码：698-706
- Affiliations：
  
  Institute of Very Large Scale Integrated Circuits, Zhejiang University, Hangzhou 310027, China
- Author bio：
  
  E-mail:ningzh@vlsi.zju.edu.cn
- Funds：
- DOI：10.1631/jzus.C1000440
  中图分类号：
- 收稿：2010-12-22，
  
  录用：2011-03-18，
  
  纸质出版：2011-08
- Accepted：
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A low drift curvature-compensated bandgap reference with trimming resistive circuit[J]. 信息与电子工程前沿（英文）, 2011,12(8):698-706.

Zhi-hua NING, Le-nian HE. A low drift curvature-compensated bandgap reference with trimming resistive circuit[J]. Frontiers of Information Technology & Electronic Engineering, 2011, 12(8): 698-706.
A low drift curvature-compensated bandgap reference with trimming resistive circuit[J]. 信息与电子工程前沿（英文）, 2011,12(8):698-706. DOI： 10.1631/jzus.C1000440.

Zhi-hua NING, Le-nian HE. A low drift curvature-compensated bandgap reference with trimming resistive circuit[J]. Frontiers of Information Technology & Electronic Engineering, 2011, 12(8): 698-706. DOI： 10.1631/jzus.C1000440.

摘要

Abstract

A low temperature drift curvature-compensated complementary metal oxide semiconductor (CMOS) bandgap reference is proposed. A dual-differential-pair amplifier was employed to add compensation with a high-order term of

(

is the thermodynamic temperature) to the traditional 1st-order compensated bandgap. To reduce the offset of the amplifier and noise of the bandgap reference

input differential metal oxide semiconductor field-effect transistors (MOSFETs) of large size were used in the amplifier and to keep a low quiescent current

these MOSFETs all work in weak inversion. The voltage reference’s temperature curvature has been further corrected by trimming a switched resistor network. The circuit delivers an output voltage of 3 V with a low dropout regulator (LDO). The chip was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC)’s 0.35-μm CMOS process

and the temperature coefficient (TC) was measured to be only 2.1×10

−

/°C over the temperature range of −40–125 °C after trimming. The power supply rejection (PSR) was −100 dB @ DC and the noise was 42 μV (rms) from 0.1 to 10 Hz.

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