Efficient implementation of a cubic-convolution based image scaling engine

Xiang WANG; Yong DING; Ming-yu LIU; Xiao-lang YAN

doi:10.1631/jzus.C1100040

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Efficient implementation of a cubic-convolution based image scaling engine

电子工程 | Updated：2022-08-31

- Efficient implementation of a cubic-convolution based image scaling engine
- Efficient implementation of a cubic-convolution based image scaling engine
- 信息与电子工程前沿（英文） 2011年12卷第9期页码：743-753
- Affiliations：
  
  Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
- Author bio：
  
  E-mail:wangxiang@vlsi.zju.edu.cn
  ‡Corresponding Author
- Funds：
- DOI：10.1631/jzus.C1100040
  中图分类号：
- 收稿：2011-02-18，
  
  修回：2011-08-22，
  
  录用：2011-06-30，
  
  纸质出版：2011-09
- Accepted：
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Efficient implementation of a cubic-convolution based image scaling engine[J]. 信息与电子工程前沿（英文）, 2011,12(9):743-753.

Xiang WANG, Yong DING, Ming-yu LIU, et al. Efficient implementation of a cubic-convolution based image scaling engine[J]. Frontiers of Information Technology & Electronic Engineering, 2011, 12(9): 743-753.
Efficient implementation of a cubic-convolution based image scaling engine[J]. 信息与电子工程前沿（英文）, 2011,12(9):743-753. DOI： 10.1631/jzus.C1100040.

Xiang WANG, Yong DING, Ming-yu LIU, et al. Efficient implementation of a cubic-convolution based image scaling engine[J]. Frontiers of Information Technology & Electronic Engineering, 2011, 12(9): 743-753. DOI： 10.1631/jzus.C1100040.

摘要

Abstract

In video applications

real-time image scaling techniques are often required. In this paper

an efficient implementation of a scaling engine based on 4×4 cubic convolution is proposed. The cubic convolution has a better performance than other traditional interpolation kernels and can also be realized on hardware. The engine is designed to perform arbitrary scaling ratios with an image resolution smaller than 2560×1920 pixels and can scale up or down

in horizontal or vertical direction. It is composed of four functional units and five line buffers

which makes it more competitive than conventional architectures. A strict fixed-point strategy is applied to minimize the quantization errors of hardware realization. Experimental results show that the engine provides a better image quality and a comparatively lower hardware cost than reference implementations.

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